1. Field of the Invention
The present invention relates to a programmable hardware counter and, more particularly, a programmable hardware timer particularly suited for use in computer systems that enables relatively consistent time intervals to be measured over a relatively wide range of performance levels.
2. Description of the Prior Art
In known computer systems, the firmware, normally stored in non-volatile memory, is executed immediately after power-up and performs several functions including testing and initializing the hardware within the computer system. While such operations are being carried out, the firmware must be able to track the amount of time lapsed between operations for various reasons including interrogating the hardware to determine whether there has been a device failure. In particular, when hardware devices are initialized, a response from the device is normally returned within a specific period of time. If the response from the device is not returned in the predetermined time period, the device is considered to have failed.
In known computer systems, software timing loops have been used for measuring such time intervals. Such software timing loops normally use an integer variable that is initialized with a specific value. This value is tested, decremented and looped until the value goes to zero. Although such a method provides adequate performance in most situations, certain problems have been known to develop with such methods which can result in system failure. In particular, since the system firmware is normally designed to operate across a relatively wide range of performance levels, it can be difficult, if not impossible, to precisely tune the timing loops to meet all requirements. For example, a software timing loop will execute considerably faster on a 66 MHz Intel type 80486 CPU than it will on a 25 MHz Intel type 80386 CPU. Such discrepancies in the time intervals can lead to system failure.